In this note, we are going to learn about Balanced Slope Detector Circuit Diagram, Working Principle or Operation. Welcome to Poly Notes Hub, a leading destination for diploma and degree engineering notes for polytechnic and b-tech students.
Author Name: Arun Paul.
Balanced Slope Detector Circuit Diagram
The above shows the circuit diagram of the balanced slope detector. The circuit diagram shows that the balanced slope detector consists of two slope detector circuits (Slope Detector 1 and Slope Detector 2). The input transformer features a center-tapped secondary. Hence, the input voltages to the two slope detectors are 180° out of phase. There are three tuned circuits. Out of them, the primary is tuned to IF, i.e., fₒ. The upper tuned circuit of the secondary (T₁) is tuned above fₒ by Δf, i.e., its resonant frequency is (fₒ + Δf). The lower tuned circuit of the secondary is tuned below fₒ by Δf, i.e., at (fₒ − Δf).
R₁C₁ and R₂C₂ are the filters used to bypass the RF ripple. V₀₁ and V₀₂ are the output voltages of the two slope detectors. The final output voltage V₀ is obtained by taking the subtraction of the individual output voltages V₀₁ and V₀₂, i.e.,
V0=V01−V02
Balanced Slope Detector Working Principle and Operation
We can understand the circuit operation by dividing the input frequency into three ranges as follows –
- fin = fₒ: When the input frequency is instantaneously equal to fc, the induced voltage in the T₁ winding of the secondary is exactly equal to that induced in the winding T₂. Thus, the input voltages to both the diodes D₁ and D₂ will be the same. Therefore, their DC output voltages V₀₁ and V₀₂ will also be identical but they have opposite polarities. Hence, the net output voltage V₀ = 0.
- fc < fin < (fc + Δf): In this range of input frequency, the induced voltage in the winding T₁ is higher than that induced in T₂. Therefore, the input to D₁ is higher than D₂. Hence, the positive output V₀₁ of D₁ is higher than the negative output V₀₂ of D₂. Therefore, the positive output voltage V₀ is positive. As the input frequency increases towards (fc + Δf), the positive output V₀ increases as shown in the characteristics figure.
If the output frequency increases beyond (fc + Δf), the output voltage will fall due to the reduction in tuned circuit response.
S Characteristics of the Balanced Slope Detector for FM Demodulation
This is the characteristics diagram (S-Shape) of of Balanced Slope Detector –
The characteristics of the balanced slope detector is shown in figure. Due to the typical shape, it is called as the S-shape characteristics and for a frequency range of (fc − Δf) to (fc + Δf), the output voltage varies linearly with frequency deviation.
| Frequency of input | Description | Output condition |
|---|---|---|
| (fc − Δf) < f < fc | Input to D₁ is less than input to D₂ | V₀₁ < V₀₂ → V₀ is negative |
| f = fc | Input to D₁ and D₂ are equal | V₀₁ = V₀₂ → V₀ = 0 |
| fc < f < (fc + Δf) | Input to D₁ is higher than input to D₂ | V₀₁ > V₀₂ → V₀ is positive |
Advantages of Balanced Slope Detector
Here we have listed some advantages of the balanced slope detector in the demodulation of the FM signal –
- This circuit is more efficient than simple slope detector.
- It has better linearity than the simple slope detector.
Disadvantages of Balanced Slope Detector
These are the drawbacks of the balanced slope detector in the demodulation of the FM signal –
- Even though linearity is good, it is not good enough.
- This circuit is difficult to tune since the three tuned circuits are to be tuned at different frequencies.
- Amplitude limiting is not provided.